From 7319479e9ae719cc0444a3972d98e4b523f02627 Mon Sep 17 00:00:00 2001 From: cfreksen Date: Sun, 29 Oct 2017 16:02:00 +0100 Subject: [PATCH] Add more binops to stepper. --- stepper.py | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/stepper.py b/stepper.py index 008e09c..9339d51 100644 --- a/stepper.py +++ b/stepper.py @@ -88,6 +88,24 @@ def eval_oper(operand, ssa_env, global_env): def eval_binop(bop, left, right): if bop == 'add': return left + right + elif bop == 'sub': + return left - right + elif bop == 'mul': + return left * right + elif bop == 'sdiv': + return left // right + elif bop == 'shl': + return left << right + elif bop == 'ashr': + return left >> right + elif bop == 'lshr': + return (left >> right) % 0x10000000000000000 + elif bop == 'and': + return left & right + elif bop == 'or': + return left | right + elif bop == 'xor': + return left ^ right else: err('Unknown LLVM Binary operator: {}' .format(bop)) @@ -103,7 +121,12 @@ define i64 @tigermain (i64 %U_mainSL_8, i64 %U_mainDummy_9) { %b = add i64 %a, %a %c = add i64 %a, %b %d = add i64 100, %c - ret i64 %d + %e = mul i64 7, %b + %f = sdiv i64 %e, 2 + %g = sub i64 %d, %f + %h = or i64 1, %g + %i = shl i64 %h, 2 + ret i64 %g } '''